Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
Reexamination Certificate
2011-01-18
2011-01-18
Kim, Matt (Department: 2186)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
For multiple memory modules
C711SE12023
Reexamination Certificate
active
07873776
ABSTRACT:
A multiple-core processor with support for multiple virtual processors. In one embodiment, a processor may include a cache including a number of cache banks, a number of processor cores and core/bank mapping logic coupled to the cache banks and processor cores. During a first mode of processor operation, each of the processor cores may be configurable to access any of the cache banks, and during a second mode of processor operation, the core/bank mapping logic may be configured to implement a plurality of virtual processors within the processor. A first virtual processor may include a first subset of the processor cores and a first subset of the banks, and a second virtual processor may include a second subset of the processor cores and a second subset of the cache banks. Subsets of processor cores and cache banks included in the first and second virtual processors may be distinct.
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Hetherington Ricky C.
Saha Bikram
Birkhimer Christopher D
Kim Matt
Kowert Robert C.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Oracle America Inc.
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