Multiple-reader multiple-writer queue for a computer system

Details Multiple-reader multiple-writer queue for a computer system Multiple-reader multiple-writer queue for a computer system

1997-07-08

1999-02-02

Bowler, Alyssa H.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

395873, 395874, 395875, 395876, 395877, 711155, G06F 300

Patent

active

058677348

ABSTRACT:
The circular queue invention herein provides a mechanism and method for producers of fixed-size data items to deliver those items to consumers even under circumstances in which multiple producers and multiple consumers share the same queue. Any producer or consumer can be permitted to preempt any producer or consumer at any time without interfering with the correctness of the queue.

REFERENCES:
patent: 4914570 (1990-04-01), Peacock
patent: 4916658 (1990-04-01), Lee et al.
patent: 5003471 (1991-03-01), Gibson
patent: 5093912 (1992-03-01), Dong et al.
patent: 5125083 (1992-06-01), Fite et al.
patent: 5155820 (1992-10-01), Gibson
patent: 5175829 (1992-12-01), Stumpf et al.
Giao N. Pham et al., "A High Throughput, Asynchronous, Dual Port FIFO Memory Implemented in ASIC Technology," 1989, pp. P3-1.1 to P3-1.4.
Ahmed E. Barbour et al., "A Parallel, High Speed Circular Queue Structure," 1990, pp. 1089-1092.

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