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Apparatus and method for fetching data from memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Apparatus and method for file level striping

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Apparatus and method for filtering unused sub-blocks in...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Apparatus and method for filtering unused sub-blocks in...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Apparatus and method for flash ROM management

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Apparatus and method for generating 64 bit addresses using a...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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Apparatus and method for generating a modulo address

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
Patent

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Apparatus and method for generating a stride used to derive a pr

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Apparatus and method for generating a stride used to derive a pr

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Apparatus and method for generating virtual addresses for...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Apparatus and method for handling memory access requests in...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Apparatus and method for handling multiple mergeable misses in a

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Apparatus and method for implementing a content addressable memo

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent

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Apparatus and method for implementing a least recently used...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Apparatus and method for implementing a programmable shared memo

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Patent

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Apparatus and method for implementing a ROM patch using a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Apparatus and method for implementing a snoop bus protocol...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Apparatus and method for implementing dynamic structure...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Apparatus and method for implementing multiple scaled states in

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Patent

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Apparatus and method for improved non-page fault loads and...

Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
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