Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2008-06-17
2008-06-17
Nguyen, T (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S137000
Reexamination Certificate
active
07389384
ABSTRACT:
The integrated circuit according to the invention comprises a processor (603), a non-volatile memory (602) and an interface (605), where said interface (605) contains a first cache memory (601.1) and a second cache memory (601.2) and connects the processor (603) to the non-volatile memory (602). The interface (605) gets data from the non-volatile memory (602) and stores them in said first or said second cache memory (601.1, 601.2) intermediately and provides the processor (603) with data from said first cache memory (601.1) or from said second cache memory (601.2), depending on where the requested data are stored.
REFERENCES:
patent: 5586081 (1996-12-01), Mills et al.
patent: 6587934 (2003-07-01), Miura et al.
patent: 2002/0144059 (2002-10-01), Kendall
patent: 2003/0204657 (2003-10-01), Lehwalder et al.
Campanale Fabrizio
Van Steenwijk Gijs
DSP Group Switzerland AG
Nguyen T
Ohlandt, Greeley, Ruggiero & Perle, LLC
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