Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Patent
1996-11-01
1999-06-08
Thai, Tuan V.
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
39520045, 395280, 395308, 711130, 711131, 711148, 711153, 711154, G06F 1200, G06F 1320, G06F 1336
Patent
active
059111496
ABSTRACT:
A computer system having a processor and at least one peripheral has a programmable shared memory system and method that selectively dedicates a first potion of memory to use by the processor and allocates a second portion of memory to shared use by the processor and any peripherals in the system. The programmable memory architecture is implemented using a dual bus architecture having a first-bus connected to the processor and a second bus coupled to the processor by a system controller and to the peripherals by a peripheral controller. The programmable memory architecture additionally has a configuration controller coupled to each configurable memory bank in the system. Each configuration controller is additionally coupled to both the first and second buses. Under programmed control, the each configuration controller couples the associated memory to either the first or second bus, responsive to configuration information stored in the system controller. Memory coupled to the first bus operates as dedicated processor memory and memory coupled to the second bus operates as shared memory, accessible by the processor and any peripherals in the system.
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Chong Siu-Ming
Luan Chung-Chen
Wang James H.
Wong John
Yeh Gong-Jong
NEC Electronics Inc.
Thai Tuan V.
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