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Selected: P

Providing core root of trust measurement (CRTM) for systems...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Providing data in response to a read command that maintains...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Providing information associated with a cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Providing memory management within a system management mode

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Providing multiple memory controllers on a memory bus

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Providing quality of service (QoS) for cache architectures...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Providing redundancy in a storage system

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Provision of a victim cache within a storage cache hierarchy

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Provision of a victim cache within a storage cache hierarchy

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Provisioning and snapshotting using copy on read/write and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Proximity communication system, proximity communication...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Proximity communication-based off-chip cache memory...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Pseudo least-recently-used (PLRU) replacement method for a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Pseudo multiport data memory has stall facility

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Pseudo precise I-cache inclusivity for vertical caches

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Pseudo random and command driven bit compensation for the...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Pseudo-bidimensional randomly accessible memory using...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Pseudo-concurrency between a volatile memory and a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Pseudo-LRU for a locking cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Pseudo-random address generation mechanism that reduces address

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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