Pseudo-random address generation mechanism that reduces address

Details Pseudo-random address generation mechanism that reduces address Pseudo-random address generation mechanism that reduces address

1995-08-18

1999-04-27

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Memory configuring

711170, 395670, G06F 1202

Patent

active

058976620

ABSTRACT:
It is known that virtual memory segments that are allocated together tend to be used together. With existing sequential address allocation mechanisms, this in turn means that programs tend to end up using the same set or sets of virtual segment addresses (i.e., in the same minitable or minitables), which, as mentioned, leads to increased address translation time because of clumping. The address allocation mechanism of the present invention reduces clumping by allocating virtual segment addresses in a pseudo-random order. This decreases the likelihood that virtual segment addresses that are allocated together end up in the same set or sets of virtual segment addresses within the address translation table.

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