Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-02-15
2005-02-15
Padmanabhan, Mano (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S146000, C711S119000, C711S136000
Reexamination Certificate
active
06857048
ABSTRACT:
A Snoop Filter for use in a multi-node processor system including different nodes of multiple processors and corresponding processor caches is provided with a Pseudo Least-Recently-Used (PLRU) replacement algorithm to identify a least-recently-used (PLRU) line from the plurality of lines in the cache array for update to reflect lines that are replaced in the processor caches.
REFERENCES:
patent: 5966729 (1999-10-01), Phelps
patent: 6049847 (2000-04-01), Vogt et al.
patent: 6304945 (2001-10-01), Koenen
patent: 6347360 (2002-02-01), Moudgal et al.
patent: 20020073281 (2002-06-01), Gaither
patent: 20020095554 (2002-07-01), McCrory et al.
patent: 20030070016 (2003-04-01), Jones et al.
Cheng Kai
Rankin Linda J.
Baker Paul A
Huter Jeffrey B.
Intel Corporation
Padmanabhan Mano
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