Bus interface controller for serially-accessed variable-access-t
Bus optimization with read/write coherence including...
Bus protocol for a switchless distributed shared memory...
Bus protocol for locked cycle cache hit
Bus snooping for cache coherency for a bus without built-in...
Bus timing protocol for a data storage system
Bypass custom array and related method for implementing ROM...
Bypassing a nonpaged pool controller when accessing a remainder
Byte swap operation for a 64 bit operand
Byte-wise tracking on write allocate
Byte-wise write allocate with retry tracking
Byte-writable two-dimensional FIFO buffer having storage locatio