Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-06-25
1999-05-04
Sheikh, Ayaz R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
395292, 395309, 395859, 711150, H01J 1300
Patent
active
059012935
ABSTRACT:
A method and controller circuitry for coupling a variable access time serial memory device to a microprocessor is disclosed. The controller circuitry includes an input for receiving address signal lines and control signal lines generated by the microprocessor, control signal lines generated by the device, and control signal lines and data signal lines for sending signals to the microprocessor and to the device. The controller circuitry further includes a decoder, responsive to the received address signal lines and control signal lines, for determining if the device can immediately respond to the microprocessor-generated request. If the device can respond to the request immediately the controller circuitry signals the device to respond to the request; otherwise, the controller circuitry responds to the request, and sends signals to the device to prepare the device to respond to future microprocessor-generated requests. The controller circuitry further includes memory to allow it to alter its responses to the microprocessor and its signals to the device dependent upon prior signals it has sent and received.
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Lathrop David N.
Phan Raymond N.
Sheikh Ayaz R.
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