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Process for operating a machine with non-uniform memory access a

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Processing method, apparatus and system for memory management us

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Processing requests to efficiently access a limited...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Processor acquisition of ownership of access coordinator for...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Processor and system for controlling shared access to a memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Processor and system for controlling shared access to a memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Processor architecture having multi-ported memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Processor associated blocking symbol controls for serializing th

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Processor memory having a dedicated port

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Processor system having address allocation and address lock capa

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Processor-implemented method of controlling data access to share

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Programmable logic device with hierarchical confiquration and st

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Programmable SRAM and DRAM cache interface with preset access pr

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Programmatic masking of storage units

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Protected configuration space in a protected environment

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Protected configuration space in a protected environment

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Protected configuration space in a protected environment

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Protection system for critical memory information

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Protocol for arbitrating access to a shared memory area...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Protocol for coordinating the distribution of shared memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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