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Power saving address translation buffer

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Pre-fetching of pages prior to a hard page fault sequence

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
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Pre-fetching of pages prior to a hard page fault sequence

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
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Precompute logic for software packet processing

Electrical computers and digital processing systems: memory – Address formation – Hashing
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Predictive translation of a data address utilizing sets of assoc

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Prefetch algorithm for short sequences

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Prefetch circuity for prefetching variable size data

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Prefetching data in a computer system

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
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Prefetching data using profile of cache misses from earlier code

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
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Prefetching data using profile of cache misses from earlier code

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
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Prefetching hints

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Pretranslating input/output buffers in environments with...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Pretranslating input/output buffers in environments with...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Process and apparatus for address extension

Electrical computers and digital processing systems: memory – Address formation – Varying address bit-length or size
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Process for allocating memory in a multiprocessor data...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Process for locating physical addresses in a nonuniform...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Process-loop monitor system and method

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
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Processing device with prefetch instructions having...

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
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Processing device with prefetch instructions having...

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
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Processing devices with improved addressing capabilities...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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