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Cache or TLB using a working and auxiliary memory with...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Cache-less address translation

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Caching device for NAND flash translation layer

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Caching dynamically allocated objects

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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CAM-based search engine devices having index translation...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Cancellation of individual logical volumes in premigration...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Capability addressing with tight object bounds

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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Carry generation in address calculation

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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Central dynamic memory manager

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Central processing unit compatible with bank register CPU

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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Central processing unit including address generation system...

Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
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Changing page size in storage media of computer system

Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
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Chipset configured to perform data-directed prefetching

Electrical computers and digital processing systems: memory – Address formation – Hashing
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Circuit and method for learning attributes of computer memory

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Circuit and method for modulo address generation with reduced ci

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
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Circuit for moving data between remote memories and a computer

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Circuit for recording digital waveform data and method of...

Electrical computers and digital processing systems: memory – Address formation – Incrementing – decrementing – or shifting circuitry
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Circuits systems and methods for managing data requests between

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Circuits, systems and method for address mapping

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
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Circular addressing algorithms providing increased...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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