Incrementing successive write operations to a plurality of...

Linear address generator and method for generating a linear...

Memory address generator capable of row-major and...

Memory address generator capable of row-major and...

Memory interface device and memory address generation device

Method and apparatus for 24-bit memory addressing in...

Method and apparatus for fast limited core area access and...

Method and apparatus for generating an interleaved address

Method and apparatus for locally generating addressing informati

Method and apparatus for resetting a gray code counter

Method and device for the incremental reading of a memory

Method and memory controller for adaptive row management...

Method and system for implementing low overhead memory...

Method and system for selectively independently or simultaneousl

Method for the automatic address generation of modules within cl

Method for updating a pointer to access a memory address in...

Microprocessor with non-aligned memory access

Modulo arithmetic

Modulus address generator and method for determining a...

Non-aligned double word access in word addressable memory