Electrical computers and digital processing systems: memory – Address formation – Incrementing – decrementing – or shifting circuitry
Reexamination Certificate
2005-02-01
2005-02-01
Sparks, Donald (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Incrementing, decrementing, or shifting circuitry
C711S001000, C711S100000, C711S220000, C711S221000
Reexamination Certificate
active
06851039
ABSTRACT:
In the method of generating an interleaved address, each 2^i mod (p−1) value for i=0 to x−1 is stored. Here, p is a prime number dependent on a block size K of a data block being processed and x is greater than one. An inter-row sequence number is multiplied with a column index number to obtain a binary product. Both the inter-row sequence number and the column index number are for the block size K and the prime number p. Then, each binary component of the binary product is multiplied with a respective one of the stored 2^i mod (p−1) values to obtain a plurality of intermediate mod value. An intra-row permutation address is generated based on the plurality of intermediate mod values, and an interleaved address is generated based on the intra-row permutation address.
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Lucent Technologies - Inc.
Peugh Brian R.
Sparks Donald
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