Incrementing successive write operations to a plurality of...

Electrical computers and digital processing systems: memory – Address formation – Incrementing – decrementing – or shifting circuitry

Reexamination Certificate

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C711S209000, C711S005000

Reexamination Certificate

active

07421564

ABSTRACT:
A centralized memory allocation system utilizes write pointer drift correction. The memory stores data units. The memory controller receives a write request associated with a data unit and stores the data unit in the memory. The memory controller also transmits a reply that includes an address where the data unit is stored. The control logic receives the reply and determines whether the address in the reply differs from an address included in replies associated with other memory controllers by a given address range. When this occurs, the control logic performs a corrective action to bring an address associated with the memory controller back within a defined range.

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