LandOfFree - US Patents - Listing for Electrical computers and digital processing systems: memory,Address formation,Combining two or more values to create address

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Device, system and method of reduced-power memory address...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Digital signal processor having a partitioned memory with first

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Direct memory access control device for a ring buffer

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Double shift instruction for micro engine used in...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Dynamic allocation of computer memory

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Enhanced microprocessor or microcontroller

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Ethernet controller

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Even/odd cache directory mechanism

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Extracted-index addressing of byte-addressable memories

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Generation of memory addresses for accessing a memory...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

High performance cache directory addressing scheme for...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

High speed four-to-two carry save adder

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Implementation of thread-static data in multi-threaded...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Input/output register programming system and method

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Instruction decoding mechanism for reducing execution time by ea

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Instruction processing unit capable of efficiently accessing the

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Mapping technique for computing addresses in a memory of an...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Matrix operation apparatus and digital signal processor...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

Mechanism for handling 16-bit addressing in a processor