Data-transfer interconnection for signal and data transfer betwe

Details Data-transfer interconnection for signal and data transfer betwe Data-transfer interconnection for signal and data transfer betwe

1997-05-05

2000-02-29

Yoo, Do Hyun

Electrical computers and digital processing systems: memory

Address formation

Combining two or more values to create address

711111, 711211, G06F 1200

Patent

active

060322438

ABSTRACT:
A data-transfer interconnection is devised for signal and data transfer between a CD-ROM decoder and a buffer memory associated with the CD-ROM decoder. In particular, the CD-ROM decoder including a data I/O port for data transfer of a total of a first number of bits and the buffer memory including a data I/O port for data transfer of a total of a second number of bits, where the second number is greater than the first number. One example of the use of this data-transfer interconnection is to allow an 8-bit CD-ROM decoder to gain access to a 16-bit DRAM buffer memory. The data-transfer interconnection is suitable for use on Fast Page-Mode DRAMs and Extended Data Out DRAMs. Each word of the 16-bit data in the DRAM is divided into a high-segment portion and a low-segment portion, which two segments can be accessed respectively through the control by a high-segment column-address strobe signal and a low-segment column-address strobe signal. This data-transfer interconnection allows the CD-ROM decoder to gain access to 16-bit DRAM-based buffer memory with the addition of just one more signal line without having to upgrade the 8-bit data bus to 16-bit ones, which is a quite a costly solution to implement.

REFERENCES:
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patent: 4912658 (1990-03-01), Sfarti et al.
patent: 5471632 (1995-11-01), Gavin et al.
patent: 5644538 (1997-07-01), Merritt
patent: 5726994 (1998-03-01), Matsuura et al.

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