Page replacement policy for systems having multiple page sizes
Page table entry management method and apparatus for a...
Page table walker that uses at least one of a default page size
Paged based memory address translation table update method...
Paged memory data processing system with overlaid memory control
Paged memory management system within a run-time environment
Paging cache optimization for virtual machine
Paging scheme for a microcontroller for extending available...
Parallel access micro-TLB to speed up address translation
Parallel computer of a distributed storage type
Parallel distributed function translation lookaside buffer
Parallel distributed function translation lookaside buffer
Parallel processor comprising multiple sub-banks to which...
Partial address compares stored in translation lookaside buffer
Physical pages de-allocation method for virtual addressing...
Pointer verification system and method
Power saving address translation buffer
Predictive translation of a data address utilizing sets of assoc
Prefetch algorithm for short sequences
Prefetch circuity for prefetching variable size data