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Scalable and flexible method for address space decoding in a...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Scalable multiple address space server

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Scaling address space utilization in a multi-threaded,...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Seamless application access to hybrid main memory

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Sectored virtual memory management system and translation look-a

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Secure computing device including operating system stored in...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Secure computing device including virtual memory table...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Segment descriptor cache addressed by part of the physical addre

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Segmenting non-volatile memory into logical pages sized to fit g

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Selective address translation for a resource such as a...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Selective address translation in coherent memory replication

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Selective address translation in coherent memory replication

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Selective address translation in coherent memory replication

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Selectively invalidating entries in an address translation...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Selectively mark free frames as unused for cooperative...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Selectively powering X Y organized memory banks

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Semiconductor device having redundant memory cell arrays and ser

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Semiconductor integrated circuit

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Semiconductor memory device and operation method thereof

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Semiconductor memory device having advanced tag block

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