Prediction and control of NBTI of integrated circuits
Print events in the simulation of a digital system
Process window compliant corrections of design layout
Program and method calculating resistance of a conductor in...
Program product supporting specification of signals for...
Programmable pattern generation for dynamic bus signal...
Property coverage in formal verification
Property specific testbench generation framework for circuit...
Pseudo random test pattern generation using Markov chains
Pulse rejection circuit model program and technique in VHDL
Random initialization of latches in an integrated circuit...
Recognizing signals in design simulation
Reconstruction of data from simulation models
Recording and displaying logic circuit simulation waveforms
Reduction of arbitrary L1-L2 circuits for enhanced verification
Remote IP simulation modeling
Replicant simulation
Reporting temporal information regarding count events of a...
Reuse of hardware components
Satisfiability (SAT) based bounded model checkers