Pseudo random test pattern generation using Markov chains

Details Pseudo random test pattern generation using Markov chains Pseudo random test pattern generation using Markov chains

2005-11-15

2005-11-15

Homere, Jean R. (Department: 2128)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Circuit simulation

C703S013000, C703S015000, C703S016000, C703S017000, C714S038110, C714S039000

Reexamination Certificate

active

06965852

ABSTRACT:
A driver module is provided that generates test patterns with desired tendencies. The driver module provides these test patterns to controlling code for simulation of a hardware model. The test patterns are generated by creating and connecting subgraphs in a Markov chain. The Markov model describes a plurality of states, each having a probability of going to at least one other state. Markov models may be created to determine whether to drive an interface in the hardware model and to determine the command to drive through the interface. Once the driver module creates and connects the subgraphs of the Markov models, the driver module initiates a random walk through the Markov chains and provides the commands to the controlling code.

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