Arithmetic logic unit temporary registers

Arithmetic logic units in series in a graphics pipeline

Asynchronous multilevel texture pipeline

Automatic memory management

Automatic memory management for zone rendering

Autonomous address translation in graphic subsystem

Back-end image transformation

Bandwidth reduction for rendering using vertex data

Bandwidth reduction for zone rendering via split vertex buffers

Batch processing of primitives for use with a texture...

Bin pointer and state caching apparatus and method

Bin pointer and state caching apparatus and method

Binning flush in graphics data processing

Bitstream format and reading and writing methods and...

Block linear memory ordering of texture data

Bucket-sorting graphical rendering apparatus and method

Buffer for driving display with asynchronous display engine

Buffering unit to support graphics processing operations

Burst memory access method to rectangular area

Burst signal generation for pipelined access to AMBA bus