2-D luma and chroma DMA optimized for 4 memory banks

3-D graphics chip with embedded DRAMbuffers

3-D rendering engine with embedded memory

Accelerated graphics port expedite cycle throttling control...

Accelerated graphics port for a multiple memory controller...

Accelerated graphics port for a multiple memory controller...

Accessing data stored in a memory

Acquisition of extended display identification data (EDID)...

Active block write-back from SRAM cache to DRAM

Adaptive scheduling to maintain smooth frame rate

Address generator for video pixel reordering in reflective LCD

Addressing a cache

Airborne real time image exploitation system (ARIES)

Allocating memory

Allocating memory based on memory device organization

API communications for vertex and pixel shaders

API communications for vertex and pixel shaders

API communications for vertex and pixel shaders

API communications for vertex and pixel shaders

Apparatus and method for accessing vertex data