Redundant via rule check in a multi-wide object class design...
Redundantly tied metal fill for IR-drop and layout density...
Reference image generation from subject image for...
Reformulation of the finite-difference time-domain algorithm...
Region-based voltage drop budgets for low-power design
Regional clock skew measurement technique
Regional signal-distribution network for an integrated circuit
Regional signal-distribution network for an integrated circuit
Regional signal-distribution network for an integrated circuit
Register file and method for designing a register file
Register file timing using static timing tools
Register retiming technique
Register transfer level (RTL) based scan insertion for...
Register transfer level power optimization with emphasis on...
Registry for electronic design automation of integrated...
Relative positioning of circuit elements in circuit design
Reliability based characterization using bisection
Reliability simulation method and system
Reliability verification device for detecting portion of design
Relocatable built-in self test (BIST) elements for...