Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Layout editor
Reexamination Certificate
2011-05-17
2011-05-17
Garbowski, Leigh Marie (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Layout editor
C716S100000, C716S102000
Reexamination Certificate
active
07945890
ABSTRACT:
A method for registering constraints for EDA (Electronic Design Automation) of an IC (Integrated circuit) includes: associating a constraint with values for constraint identification that identify the constraint in an IC design; associating the constraint with values for constraint relationships that relate the constraint to at least one EDA application; saving the constraint identification values and the constraint relationship values in a constraint registry element; and providing an interface to a user for accessing values of the constraint registry element.
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Colwell Regis
Lamant Gilles S. C.
Rosek Timothy
Yurovsky Alisa
Cadence Design Systems Inc.
Garbowski Leigh Marie
Schwegman Lundberg & Woessner, P.A.
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