Min-time / race margins in digital circuits
Minimal length method for positioning unit pins in a...
Minimal level sensitive timing representative of a circuit path
Minimization of circuit delay and power through transistor...
Minimization of microelectronic interconnect thickness...
Minimizing computational complexity in cell-level noise...
Minimizing effects of interconnect variations in integrated...
Minimizing effects of interconnect variations in integrated...
Minimizing impact of design changes for integrated circuit...
Minimizing logic by resolving "don't care" output values in a fi
Minimizing number of masks to be changed when changing...
Minterm tracing and reporting
Mixed hardware/software architecture and method for...
Mixed signal synthesis behavioral models and use in circuit...
Mixed-mode optical proximity correction
Mixing and matching method and integration system for...
Mode register in an integrated circuit that stores test...
Model checking with layered localization reduction
Model for simulating tree structured VLSI interconnect
Model for taking into account gate resistance induced propagatio