Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Patent
1994-10-19
2000-06-13
Donaghue, Larry D.
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
716 15, 716 18, G06F 1900
Patent
active
060744286
ABSTRACT:
Logic which implements an output encoded finite state machine is reduced by resolving "don't care" output values. Specifically, in order to generate logic for a finite state machine, input is received from a user. The input specifies states of the finite state machine, transition conditions between states and output values for each state. For example, a graphical user interface receives from the user a graphic portrayal of a state diagram. At least one output value is unspecified for at least one state. Logic for a finite state machine is generated from the user inputs. The generation includes, for each output of the finite state machine, generating an output flip-flop which stores the output. Values are assigned to unspecified output values. The assigned values are selected so that each state can be uniquely identified by current values stored by the output flip-flops and a minimum of additional flip-flops. For example, the assignment is done by determining a number of times output values between two states are identical for every combination of values for the unspecified output values. The combination of values which results in a minimum number of times output values between two states are identical is the combination of values assigned to the unspecified output values.
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Donaghue Larry D.
Hewlett--Packard Company
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