Bus control system in a multi-processor system

Bus controller and electronic device in a system in which severa

Bus controller command block processing system

Bus controller for adjusting a bus master to a bus slave

Bus controller for adjusting port size communication between a b

Bus controller having state machine for translating commands and

Bus controller with different microprocessor and bus clocks and

Bus converter

Bus cycle timing control circuit having bus cycle enable/disable

Bus data path control scheme

Bus device for generating and responding to slave response codes

Bus device for use in a computer system having a synchronous bus

Bus device which abstains from round robin arbitration

Bus device which performs protocol confidential transactions

Bus driving and decoding circuit

Bus error processing system having direct bus master/CPU communi

Bus error recognition for microprogrammed data processor

Bus event monitor

Bus expander with logic for virtualizing single cache control in

Bus extender circuitry for data transmission