Pattern for routing power and ground for an integrated...
Per-bit set-up and hold time adjustment for double-data rate...
Peripheral circuits of electrically programmable...
Personalizable gate array devices
Polydirectional non-orthoginal three layer interconnect architec
Power and signal routing technique for gate array design
PRAMs having a plurality of active regions located...
Precision capacitor array
Programmable capacitor and method of operating same
Programmable capacitor for an integrated circuit
Programmable device having antifuses without programmable materi
Programmable microsystems in silicon
Programmable resistance memory element with titanium rich...
Protection circuit located under fuse window