Reduced size plate layer improves misalignments for CUB DRAM
Reduced soft error rate (SER) construction for integrated...
Reduced substrate capacitance high performance SOI process
Reduced surface field device having an extended field plate and
Reduced-cost, flash memory element and memory apparatus
Reduced-edge radiation-tolerant non-volatile transistor...
Reducing oxidation stress in the fabrication of devices
Reducing resistance in source and drain regions of FinFETs
Reducing reverse short-channel effect with light dose of P with
Reducing the effects of néel coupling in MRAM structures
Reduction of bipolar gain and improvement in snap-back sustainin
Reduction of channel hot carrier effects in transistor devices
Reduction of chemical mechanical planarization (CMP)...
Reduction of damage in semiconductor container capacitors
Reduction of damage in semiconductor container capacitors
Reduction of dopant diffusion by the co-implantation of impuriti
Reduction of polysilicon stress in trench capacitors
Reduction of reverse short channel effects by implantation...
Reduction of shorts among electrical cells formed on a...
Reference voltage semiconductor