Circuit and method for reducing compensation of a ferroelectric
Circuit and method for substantially preventing imprint...
Circuit and method for testing a ferroelectric memory device
Circuit and method for testing a ferroelectric memory device
Circuit and method for testing a ferroelectric memory device
Circuit and method of operating a ferrolectric memory in a DRAM
Circuit configuration for equalizing different voltages on...
Circuit configuration for generating a reference voltage for...
Circuit configuration for reading a memory cell having a...
Circuit for driving nonvolatile ferroelectric memory
Circuit for driving nonvolatile ferroelectric memory
Circuit for driving nonvolatile ferroelectric memory
Circuit for driving nonvolatile ferroelectric memory
Circuit for generating a centered reference voltage for a...
Circuit for generating a centered reference voltage for a...
Circuit for generating timing of reference plate line in...
Circuit for providing an adjustable reference voltage for...
Circuit for providing an adjustable reference voltage for...
Circuit to simulate the polarization relaxation phenomenon...
Circuits for driving FRAM