Large-scale EPROM memory with a high coupling factor

Details Large-scale EPROM memory with a high coupling factor Large-scale EPROM memory with a high coupling factor

1989-08-11

1991-04-30

Fears, Terrell W.

Static information storage and retrieval

Floating gate

Particular biasing

357 235, G11C 1140, H01L 2968

Patent

active

050124463

ABSTRACT:
An electrically programmable non-volatile memory comprises an array of word lines (LM2) extending along rows, connecting the control gates of floating gate transistors, and an array of bit lines (LB1, LB2) extending along columns, connecting the drains of the floating gate transistors. A conductive area (35) having a larger size than each floating gate (23) along horizontal direction, is connected to the floating gate (23) of each transistor, and is superposed with the corresponding word line (LM2) from which it is separated by an isolation layer (28).

REFERENCES:
patent: 4360900 (1982-11-01), Bate
patent: 4377818 (1983-03-01), Kuo et al.
patent: 4597060 (1986-06-01), Mitchell et al.
patent: 4812898 (1989-03-01), Sumihiro
patent: 4855800 (1989-08-01), Esquivel et al.
patent: 4868619 (1989-09-01), Mukherjee
patent: 4887238 (1989-12-01), Bergemont

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