Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-05-15
2007-05-15
Phung, Anh (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185140, C365S185170, C365S195000
Reexamination Certificate
active
11223623
ABSTRACT:
A non-volatile memory is programmed in a manner which reduces the incidence of program disturb for inhibited memory elements which undergo boosting to reduce program disturb, but which experience reduced boosting benefits due to their word line location. To achieve this result, a word line sequence in which the memory elements are programmed is adjusted so that higher word lines are programmed first, out of sequence relative to the remaining word lines. Additionally, self-boosting can be used for the higher word lines, while erased area self-boosting or a variant can be used for the remaining word lines. Furthermore, pre-charging of the channel of the inhibited memory elements may be employed prior to the self boosting, for the non-volatile storage elements which are programmed after those associated with the first word line.
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Lutze Jeffrey W.
Wan Jun
Le Toan
Phung Anh
Sandisk Corporation
Vierra Magen Marcus & DeNiro LLP
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