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Single electron device, method of manufacturing the same,...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Single gate inverter nanowire mesh

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Single transistor memory cell with reduced programming voltages

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI (silicon on insulator) device and method for fabricating the

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI active pixel cell design with grounded body contact

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI CMOS device with reduced DIBL

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI CMOS device with reduced DIBL

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SOI device and method for fabricating the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI device for DRAM cells beyond gigabit generation and method f

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI device with body contact self-aligned to gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI device with reduced drain induced barrier lowering

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI device with reduced drain induced barrier lowering

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SOI device with reduced junction capacitance

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI device with reduced junction capacitance

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI device with wrap-around contact to underside of body,...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI FET and method for creating FET body connections with...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI field effect transistor element having a recombination...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI low capacitance body contact

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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SOI pass-gate disturb solution

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SOI semiconductor device with body contact and method thereof

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