SOI device for DRAM cells beyond gigabit generation and method f

Details SOI device for DRAM cells beyond gigabit generation and method f SOI device for DRAM cells beyond gigabit generation and method f

1999-08-16

2000-03-14

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438151, 438155, 438171, 438149, 257347, 257300, 257353, 257355, H01L 2100, H01L 2184

Patent

active

060371994

ABSTRACT:
A process enabling high density, DRAM semiconductor chips to be achieved, via formation of DRAM cells, in SOI segments, has been developed. The process features the formation of an SOI layer, propagating from a central node region of a semiconductor substrate, exposed in an opening in an insulator layer, and with the SOI layer extending, and overlying, a portion of the insulator layer, at a distance between about 4 to 5 um, from the central node region. Individual SOI segments are then formed via trimming of the SOI layer, via oxidation of unwanted regions of the SOI layer, followed by removal of these oxidized regions. The DRAM cell, at an area between about 0.28 to 0.32 um.sup.2 is next formed in the individual SOI segments.

REFERENCES:
patent: 4749441 (1988-06-01), Christenson et al.
patent: 4829016 (1989-05-01), Neudeck
patent: 4897366 (1990-01-01), Smeltzer
patent: 5037774 (1991-08-01), Yamawaki et al.
patent: 5445107 (1995-08-01), Roth et al.
patent: 5610087 (1997-03-01), Hsu et al.
patent: 5686343 (1997-11-01), Lee
patent: 5708286 (1998-01-01), Uesugi et al.
patent: 5712173 (1998-01-01), Liu et al.

Affiliated with

Also associated with

Rating

SOI device for DRAM cells beyond gigabit generation and method f does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with SOI device for DRAM cells beyond gigabit generation and method f, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and SOI device for DRAM cells beyond gigabit generation and method f will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-168661