Timer circuit
Toggle flip-flop network with a reduced integration area
Track and hold circuit
Trans-admittance trans-impedance logic for integrated circuits
Transistor circuit with a self-holding circuit for a relay
Transmission-gate based flip-flop
Transparent flip-flop
Trigger voltage controllable Schmitt trigger circuit
Triple redundant latch design using a fail-over mechanism...
Triple redundant latch design with storage node recovery
True single-phase flip-flop
True type single-phase shift circuit
Two input-two output differential latch circuit
Two-latch clocked-LSSD flip-flop
Two-latch clocked-LSSD flip-flop
Ultra high speed clocked analog latch
Ultra low area overhead retention flip-flop for power-down...
Ultra low-power data retention latch
Ultra-drowsy circuit
Unbuffered latch resistant to back-writing and method of operati