Digital storage element architecture comprising dual scan...
Digital storage element architecture comprising dual scan...
Digital storage element architecture comprising dual scan...
Digital storage element architecture comprising integrated...
Digital storage element architecture comprising integrated...
Digital storage element with dual behavior
Digital storage element with dual behavior
Discrete programmable one-shot timed pulse circuit
Double edge trigger d-type flip-flop
Double edge triggered flip-flop
Double edge-triggered flip-flops
Double-edge-triggered flip-flop providing two data...
Drive circuit detecting slow signal transition
Dual clock D type flip-flop
Dual data rate flip-flop
Dual edge D flip flop
Dual edge-triggered flip-flop design with asynchronous...
Dual latch clocked LSSD and method
Dual latch clocked LSSD and method
Dual operational mode CML latch