Digital storage element with dual behavior

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

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Details

C327S218000

Reexamination Certificate

active

11171612

ABSTRACT:
A digital storage element comprises a master transparent latch that receives functional data from a data input port and scan data from a scan input port and a slave transparent latch coupled to the master transparent latch. The slave transparent latch comprises dedicated functional data and scan data output ports. The master and slave transparent latches have opposite transparent polarities when in a functional mode and have the same polarities (e.g., positive level sense) when in a scan mode. The transparent polarity of a transparent latch defines the state of a clock to that latch for which the transparent latch is transparent.

REFERENCES:
patent: 5812561 (1998-09-01), Giles et al.
patent: 5920575 (1999-07-01), Gregor et al.
patent: 6389566 (2002-05-01), Wagner et al.
patent: 2004/0075479 (2004-04-01), Gupta
patent: 2005/0005214 (2005-01-01), Ueda
patent: 2005/0091562 (2005-04-01), Krishnamoorthy et al.
patent: 2005/0216806 (2005-09-01), Verwegen
Khan, Waheed U. et al., U.S. Appl. No. 10/952,289, filed Sep. 28, 2004, entitled, “High Speed Energy Conserving Scan Architecture,” 18 pages including 4 pages of Formal Drawings.

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