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LDPC decoding apparatus and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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LDPC decoding apparatus and method based on node memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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LDPC decoding methods and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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LDPC encoders, decoders, systems and methods

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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LDPC encoding methods and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Leakage current reduction system and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Library apparatus, conveyance controller, and control method...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Library system storing removable storage media

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Library unit with spare media and it's computer system

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Light weight and high throughput test case generation...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Lightweight persistent storage system for flash memory devices

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Limit interface for performance management

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Limited latch linehold capability for LBIST testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Limiting number of retransmission attempts for data transfer...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Line error checking circuit for an electric data...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Linear approximation of the max* operation for log-map decoding

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Linear feedback shift register reseeding

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Linear feedback shift register, multiple input signature registe

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Linear program-based technique for placing FRR TE tunnels...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Link adaptation for retransmission error-control technique...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
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