4-level logic decoder
Detector circuit for use with tri-state logic devices
Device and method for binary-multilevel operation
Differential termination resistor adjusting circuit
High speed interface apparatus
High speed interface apparatus
Interface circuit using a limited number of pins in LSI applicat
Low power tri-level decoder circuit
Multi-level driver stage
Multiple-bit, current mode data bus
Multiple-bit, current mode data bus
Reduced complexity multiple resonant tunneling circuits for posi
Self-biasing CMOS PECL receiver with wide common-mode range and
Simultaneous bi-directional signal transmission system and...
Systems and methods for maintaining board signal integrity
Ternary/binary converter circuit
Three state logic input
Three-value input buffer circuit
Trinary signal apparatus and method