Electronic digital logic circuitry – Three or more active levels – With conversion
Reexamination Certificate
2000-09-08
2001-04-03
Nguyen, Viet Q. (Department: 2818)
Electronic digital logic circuitry
Three or more active levels
With conversion
C326S059000, C375S214000, C375S286000, C341S050000, C341S056000
Reexamination Certificate
active
06211698
ABSTRACT:
FIELD OF THE INVENTION
1. Field of the Invention
The present invention relates to a much higher speed interface apparatus. In particular, the present invention relates to a much higher speed interface apparatus in which the bandwidth is widened twice, even with keeping the bus width and the system bus frequency thereof as they are, by provision of a reference voltage generating means for discriminating two-bit data signals.
2. Description of the Prior Art
Generally, DRAMs used in a main memory and a graphic card of the computer require a higher bandwidth for improved system performance, and thus necessitate a bus interface for switching data signals at high speed.
Thus, in past twenty years, the TTL bus interface has been widely used as an industry standard. However, the bus interface has the problems of increased power consumption, noises etc. at a system speed more than 50 MHz and also of limited high speed due to reflection of signal and occurrence of ringing.
To alleviate the above problems a little, conventionally a low voltage has been used. Especially, LVTTL(low voltage TTL) has been widely used at a system speed less than 100 MHz. However, it also has various problems such as increased power consumption, noises etc. at a system speed more than 100 MHz, similar to those of the TTL interface.
In order to solve these problems, recently there has been proposed a SSTL(stub series transceiver logic) interface or a RSL (rambus signaling logic) interface. However, since the high speed bus interfaces have to increase the system bus frequency or widen the bus width in order to increase the bandwidth, they have problems of increased power consumption, noises, electromagnetic interference(EMI), cost etc.
FIG. 1
shows the construction of a conventional interface apparatus in which a transmission line is a single termination. In
FIG. 1
, the interface apparatus includes N data drivers
11
for receiving data signals data
—
1~n, respectively, N transmission lines
13
each connected to the N data drivers
11
for transmitting the received data signals, respectively, and N receivers
15
for receiving the data signals transmitted through the transmission lines
13
, comparing them with an external input reference voltage Vref and then outputting data signals, respectively. The interface apparatus further includes termination voltage application terminals Vtt and termination resistors Rt at the end of the transmission lines
13
so that reflection of the data signal transmitted through the transmission lines
13
can be prevented to reduce distortion of signal.
In the conventional interface apparatus having the above construction, the data signals are divided into two-levels of ‘high’ and ‘low’ on the basis of the external input reference voltage Vref and N bits of data are transmitted once via the N transmission lines
13
. Also, the transmission lines
13
are terminated by the termination resistor Rt corresponding to their characteristics impedance, respectively, thus preventing a signal distortion due to reflection of the transmitted signals.
Due to the above operation, the conventional interface apparatus requires an increased bandwidth for a higher data transmission. However, since the bandwidth=system bus frequency×bus width, either the system bus frequency or the bus width must be increased twice so as to increase the bandwidth twice in the bus interface apparatus using two-levels, for example.
As above, the conventional interface apparatus unnecessarily requires increased bandwidth for high speed transmission. As a result, it has the problems of increasing input/output power consumption and system cost due to increased bus frequency and bus width, and also of further occurring noises and an electromagnetic interference etc.
SUMMARY OF THE INVENTION
It is an object of the present invention to solve the problems involved in the prior art, and to provide a much higher speed interface apparatus in which the bandwidth is widened twice, even with keeping the bus width and the system bus frequency thereof as they are.
To achieve the above object, the much higher speed interface apparatus according to the present invention comprises a data driving means for decoding two-bit data signals using them as inputs to output four-level data signals; a reference voltage generating means for generating three-level reference voltages to discriminate the voltage levels of the four-level data signals; and a receiver means for comparing the four-level data signals and the three-level reference voltage signals using them as inputs and for encoding the resulting signals to output two data signals.
Further, if the reference voltages generated from the reference voltage generating means are divided into two-levels of first and second driving voltages and an additional third reference voltage input from the receiver means is provided, the same high speed interface apparatus of performing twice higher transmission can be constructed.
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Hyundai Electronics Industries Co,. Ltd.
Nguyen Viet Q.
Pennie & Edmonds LLP
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