Electronic digital logic circuitry – Three or more active levels – With conversion
Reexamination Certificate
2000-05-10
2001-09-25
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Three or more active levels
With conversion
C326S016000, C326S080000, C326S083000
Reexamination Certificate
active
06294931
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to integrated circuits and, in particular, to systems and methods for maintaining board signal integrity.
2. Description of the Related Art
Integrated circuits (IC's) are electrical circuits which incorporate transistors, resistors, capacitors, and other components onto a single semiconductor “chip” in which the components are interconnected to perform a given function. Typical examples of IC's include microprocessors, programmable logic devices (PLDs), electrically erasable programmable memory devices (EEPROMs), random access memory devices (RAMs), operational amplifiers and voltage regulators, among others. Typically, such IC's are incorporated into an electronic system by packaging the IC's, e.g., providing interconnections between and/or among various IC's and/or other electronic components for providing transmission paths for signals of the electronic system.
During transmission through an electronic system, signals are propagated among and/or through various components. For instance, a signal, e.g., a chip pad signal, typically is provided to the pad(s) of a package, with the package then providing another signal, e.g., a board signal, to a mother board, for example. Since signals, such as chip pad signals, are being adapted with what appear to be ever-increasing frequencies, these signals tend to be distorted by interfaces, such as driver-to-package and package-to-board interfaces, for instance, oftentimes resulting in less than desired electrical performance of the system.
Therefore, there is a need for devices, systems and methods which address these and other shortcomings of the prior art.
SUMMARY OF THE INVENTION
Briefly described, the present invention generally relates to systems and methods for maintaining board signal integrity. In a preferred embodiment, a circuit for altering a chip pad signal is provided. As is known, a chip pad signal is configured to provide a first logic high and a first logic low to an IC package, with the first logic high having a voltage higher than a voltage of the first logic low. The circuit incorporates a primary driver that is configured to deliver a chip pad signal to an IC package. The circuit also is configured to cooperate with a second signal and a third signal, with the second signal having a voltage higher than the voltage of the first logic high, and the third signal having a voltage lower than the voltage of the first logic low. So configured, the primary driver may selectively deliver a second logic high, which has a voltage higher than the voltage of the first logic high, to the IC package, and driver may selectively deliver a second logic low, which has a voltage lower than the voltage of the first logic low, to the IC package.
In accordance with another aspect of the present invention, an alternative embodiment of the present invention includes a primary driver which incorporates a primary driver first input, a primary driver second input, a primary driver third input, a primary driver fourth input and a primary driver output, with the primary driver being configured to deliver a chip pad signal, via the primary driver output, to an IC package. Typically, the chip pad signal is delivered in response to inputs from a primary driver first signal, a primary driver second signal, a primary driver third signal, and a primary driver fourth signal. More specifically, the primary driver first signal and the primary driver second signal each are adapted to provide a logic high and a logic low to the primary driver, via the primary driver first input and the primary driver second input, respectively, so that, in response to a logic high received concurrently from the primary driver first signal and the primary driver second signal, the primary driver provides the primary driver third signal as the chip pad signal. Likewise, in response to a logic low received from either the primary driver first signal or the primary driver second signal, the primary driver provides the primary driver fourth signal as the chip pad signal.
Additionally, the circuit is configured to receive a fifth signal having a voltage higher than a voltage of the primary driver third signal, and a sixth signal having a voltage lower than a voltage of said primary driver fourth signal so that the chip pad signal is adapted to be formed from at least three of the group consisting of: (1) the primary driver third signal; (2) a summation of the fifth signal and the primary driver third signal; (3) the primary driver fourth signal, and; (4) a summation of the sixth signal and the primary driver fourth signal.
In accordance with another aspect of the present invention, electrical devices and systems incorporating an IC package and a circuit, as described herein, are provided.
In accordance with another aspect of the present invention, a preferred method for providing a chip pad signal to an IC package includes the steps of: (1) applying a test chip pad signal to the IC package, the test chip pad signal corresponding to a chip pad signal to be applied to the IC package during operation of the IC package; (2) determining whether the board signal provided by the IC package in response to the test chip pad signal is acceptable, and; (3) if the board signal is not acceptable, modifying the chip pad signal to be applied to the IC package during operation of the IC package.
REFERENCES:
patent: 5610533 (1997-03-01), Arimoto et al.
patent: 5798659 (1998-08-01), Shay et al.
patent: 6040709 (2000-03-01), Kishimoto
patent: 6194915 (2001-02-01), Nakayama et al.
Agilent Technologie,s Inc.
Le Don Phu
Tokar Michael
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