Trinary to binary level conversion circuit

Trip-point clamping circuit for a semiconductor device

Triple diffused logic elements

Triple layer polysilicon cell

Triple rail logic gate

Triple state to binary converter

Tristable multivibrator

Tristable output buffer with state transition control

Tristate changeover switching circuit

Tristate circuit using bipolar transistor and CMOS transistor

Tristate circuits with fast and slow OE signals

Tristate data output buffer having reduced switching noise and i

Tristate driver circuit with low standby power consumption

Tristate logic buffer circuit with enhanced dynamic response

Tristate logic buffer circuit with reduced power consumption

Tristate output buffer with high-impedance state responsive to i

Tristate output circuit with input protection

Tristate output circuit with selectable output impedance

Tristate output gate structure particularly for CMOS integrated

Tristate transistor logic circuit with reduced power dissipation