Tristate circuit using bipolar transistor and CMOS transistor

Details Tristate circuit using bipolar transistor and CMOS transistor Tristate circuit using bipolar transistor and CMOS transistor

1989-03-03

1991-09-10

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307473, H03K 1716

Patent

active

050476696

ABSTRACT:
In a semiconductor integrated circuit, drain-source paths of an NMOS transistor and a PMOS transistor are connected between the base and emitter of a bipolar transistor, and control signals are applied to gates of the NMOS transistor and the PMOS transistor so as to keep the NMOS transistor and the PMOS transistor at OFF condition when the bipolar transistor is operating and so as to keep the NMOS transistor and the PMOS transistor at ON condition when the bipolar transistor is in the quiescent state.

REFERENCES:
patent: 4612458 (1986-09-01), Vasseghi et al.
patent: 4649294 (1987-03-01), McLaughlin
patent: 4678943 (1987-07-01), Uragami et al.
patent: 4682054 (1987-07-01), McLaughlin
patent: 4725982 (1988-02-01), Hara et al.
patent: 4740718 (1988-04-01), Matsui
patent: 4804869 (1989-02-01), Masuda et al.
patent: 4845385 (1989-07-01), Ruth, Jr.

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