Tristable output buffer with state transition control

Details Tristable output buffer with state transition control Tristable output buffer with state transition control

1990-06-14

1991-07-02

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, H03K 1704

Patent

active

050288172

ABSTRACT:
Voltage on a circuit ground terminal in an output buffer is controlled by limiting induced voltage on a circuit ground pad as the output makes a transition from a high voltage level to a low voltage level thereby minimizing deleterious effects on other circuits connected to the common circuit ground terminal. A ground bounce circuit controls the bias on a transistor connecting the output to the circuit ground terminal with power saver circuitry limiting actuation of the ground bounce circuitry except during the high to low transitional phase.

REFERENCES:
patent: 4771195 (1988-09-01), Stein
patent: 4777389 (1988-10-01), Wu et al.
patent: 4782252 (1988-11-01), Levy et al.
patent: 4800298 (1989-01-01), Yu et al.
patent: 4855622 (1989-08-01), Johnson
patent: 4959561 (1990-09-01), McDermott et al.
patent: 4961010 (1990-10-01), Davis

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