Tristate logic buffer circuit with enhanced dynamic response

Details Tristate logic buffer circuit with enhanced dynamic response Tristate logic buffer circuit with enhanced dynamic response

1978-05-30

1980-03-18

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307317A, 307270, 307299A, H03K 329, H03K 1908

Patent

active

041941314

ABSTRACT:
A current mirror transistor is included in a tristate logic buffer circuit, with its base and emitter respectively connected to the base and emitter of the phase splitter transistor and its collector connected to the voltage supply terminal. The emitter size of the current mirror transistor is a multiple of the emitter size of the phase splitter transistor. A high resistance connected between the voltage supply terminal and the collector of the phase splitter transistor provides lower power consumption when the circuit is disabled; and the current mirror transistor supplements the drive current provided by the phase splitter transistor when the circuit is not disabled.

REFERENCES:
patent: 3602733 (1971-08-01), Aoki
patent: 3792292 (1974-02-01), Priel
patent: 4081695 (1978-03-01), Allen et al.

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