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Acquiring instruction addresses associated with performance...

Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
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Activating a design test mode in a graphics card having...

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Adapter for a microprocessor

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Analyzing instruction completion delays in a processor

Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
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Apparatus and computer program product for implementing...

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Apparatus and method for efficiently incorporating...

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Apparatus and method for microcontroller debugging

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Apparatus and method for processing pipelined data

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Apparatus and method for providing extended address modes in...

Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
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Apparatus and method for providing extended address modes in...

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Apparatus for sampling instruction execution information in...

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Apparatus for sampling path history in a processor pipeline

Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
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Array access boundary check by executing BNDCHK instruction...

Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
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Array access boundary check by executing BNDCHK instruction...

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Asynchronously accessing the program counter values of a...

Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
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Branch tracing generator device and method for a...

Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
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Breakpointing on register access events or I/O port access...

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Bytecode instruction processor with switch instruction...

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Cache fencing for interpretive environments

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Central processing unit for easily testing and debugging...

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