SIMD processor with scalar arithmetic logic units
SIMD system having logic units arranged in stages of tree struct
SIMD/MIMD processing synchronization
Simultaneous parity generating/reading circuit for massively par
Single chip multiprocessor with shared execution units
Single instruction multiple data array cell
Single instruction multiple data massively parallel...
Single instruction stream multiple data stream processor
Single integrated circuit embodying a dual heterogenous...
Single-chip microcomputer operable in master and slave modes...
Single-chip microcomputer with hierarchical internal bus...
Single-instruction multiple-data processor with input and output
Single-instruction-multiple-data processing in a multimedia sign
Slaves with identification and selection stages for group write
SMP clusters with remote resource managers for distributing work
SoC architecture for voice and video over data network...
SoC architecture for voice and video over data network...
Software mechanism for accurately handling exceptions generated
Software pipelining a hyperblock loop
Special purpose processor for digital audio/video decoding