SIMD system having logic units arranged in stages of tree struct

Electrical computers and digital processing systems: processing – Processing architecture – Array processor

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712 12, 712 16, 712 20, G06F 1500

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active

RE0369543

ABSTRACT:
In a parallel computer system using a SIMD method constituted by a controller and a plurality of processor elements, each of the processor elements has a storage unit to store data to be processed, the controller controls operation of the processor elements, and the parallel computer system performs processing of the data based on a calculation control signal transmitted from the controller. The parallel computer system further a data collection unit connected between the processor elements and the controller for receiving output data from the processor elements, performing a predetermined calculation, and outputting calculated data to the controller; and a calculation control unit connected between the data collection unit and the controller for transmitting the calculation control signal from the controller to the data calculation unit to make it possible to perform the predetermined calculation in the data collection circuit.

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